11 research outputs found

    A 4.5-5.8 GHz Differential LC VCO using 0.35 m SiGe BiCMOS Technology

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    In this paper, design and realization of a 4.5-5.8 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is implemented with 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). A linear, 1300 MHz tuning range is measured with accumulation-mode varactors. Fundamental frequency output power changes between -1.6 dBm and 0.9 dBm, depending on the tuning voltage. The circuit draws 17 mA from 3.3 V supply, including buffer circuits leading to a total power dissipation of 56 mW. Post-layout phase noise is simulated -110.7 dBc/Hz at 1MHz offset from 5.8 GHz carrier frequency and -113.4 dBc/Hz from 4.5 GHz carrier frequency. Phase noise measurements will be updated in the final manuscript. The circuit occupies an area of 0.6 mm2 on Si substrate including RF and DC pads

    IEEE 802.11a uygulamaları için 4.2-5.4 GHz LC gerilim kontrollü Osilatör tasarımı (Design of a 4.2-5.4 GHz LC VCO for IEEE 802.11a applications)

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    In this paper, a 4.2-5.4 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11 a standard is presented. The circuit is designed with AMS 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). Phase noise is -110.7 dBc/Hz at 1MHz offset from 5.4 GHz carrier frequency and -113.5 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained utilizing accumulation-mode MOS varactors. Phase noise is relatively low due to taking the advantage of differential tuning concept. Output power of the fundamental frequency changes between 3mW and 3.5mW depending on the tuning voltage. The circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit occupyies an area of 0.6 mm2 on Si substrate

    Design of a 4.2-5.4 GHz Differential LC VCO using 0.35 m SiGe BiCMOS Technology

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    In this paper, a 4.2-5.4 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35´m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). Phase noise is -110.7 dBc/Hz at 1MHz offset from 5.4 GHz carrier frequency and -113.5 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained utilizing accumulation-mode varactors. Phase noise is relatively low due to taking the advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. The circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit occupies an area of 0.6 mm2 on Si substrate including RF and DC pads

    Design of a 4.2-5.4 GHz differential LC VCO using 0.35 mu m SiGeBiCMOS technology for IEEE 802.11a applications

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    In this paper, a 4.2-5.4 GHz, -Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35 mu m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is -110.7 dBc/Hz at 1 MHz offset from 5.4 GHz carrier frequency and -113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low because of taking advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm(2) on Si substrate, including DC and RF pads

    Diamond semiconductor technology for RF device applications

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    This paper presents a comprehensive review of diamond electronics from the RF perspective. Our aim was to find and present the potential, limitations and current status of diamond semiconductor devices as well as to investigate its suitability for RF device applications. While doing this, we briefly analysed the physics and chemistry of CVD diamond process for a better understanding of the reasons for the technological challenges of diamond material. This leads to Figure of Merit definitions which forms the basis for a technology choice in an RF device/system (such as transceiver or receiver) structure. Based on our literature survey, we concluded that, despite the technological challenges and few mentioned examples, diamond can seriously be considered as a base material for RF electronics, especially RF power circuits, where the important parameters are high speed, high power density, efficient thermal management and low signal loss in high power/frequencies. Simulation and experimental results are highly regarded for the surface acoustic wave (SAW) and field emission (FE) devices which already occupies space in the RF market and are likely to replace their conventional counterparts. Field effect transistors (FETs) are the most promising active devices and extremely high power densities are extracted (up to 30 W/mm). By the surface channel FET approach 81 GHz operation is developed. Bipolar devices are also promising if the deep doping problem can be solved for operation at room temperature. Pressure, thermal, chemical and acceleration sensors have already been demonstrated using micromachining/MEMS approach, but need more experimental results to better exploit thermal, physical/chemical and electronic properties of diamond

    Design of a 4.2-5.4 GHz Differential LC VCO Using 0.35m SiGe BiCMOS Technology for IEEE 802.11a Applications

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    In this paper, a 4.2-5.4 GHz, Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is -110.7 dBc/Hz at 1MHz offset from 5.4 GHz carrier frequency and -113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low due to taking the advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm2 on Si substrate, including DC and RF pads

    IEEE 802.11a standard uyumlu, RF alıcı-verici alt-blok devrelerinin gerçeklenmesi

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    Bu çalışmanın amacı IEEE 802.11a standardı ile uyumlu, yüksek performanslı, düşük maliyetli, alıcıverici sisteminin alt ünitelerini gerçeklemektir. Alıcı-verici sisteminin parçaları olan, özgün Düşük güçlü kuvvetlendirici (LNA), Gerilim Kontrollü Osilatör (VCO), Karıştırıcı (Mixer), ve Güç Kuvvetlendiricisi (Power amplifier - PA). Devreler, Cadence ve ADS tasarım / simülasyon /modelleme ortamları kullanılarak, Austria Micro Systems (AMS) 0.35´m SiGe BiCMOS HBT teknolojisi ile tasarlanmış / gerçekleştirilmiştir. VCO ve LNA devreleri ürettirilmiş ve test edilmiş, Mixer ve PA üretime gönderilmek üzere tasarlanıp/optimize edilmiştir
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